Case Study

Rambus Detects and Eliminates AES Side-Channel Leakage Before Silicon Fabrication

Rambus Detects and Eliminates AES Side-Channel Leakage Before Silicon Fabrication

Rambus Detects and Eliminates AES Side-Channel Leakage Before Silicon Fabrication

Pages 12 Pages

This case study follows III-V Lab’s SMART3 project to develop an InAlN/GaN-on-SiC power amplifier and integrate it into fan-out wafer-level packaging. At V-band frequencies, package and board parasitics, grounding, heat dissipation, and RF transitions can significantly reduce performance. Engineers used Keysight ADS, RFPro, EMPro, and Smart Mount to co-design the MMIC, package, and PCB, merge technology layers, visualize electromagnetic fields, and optimize interconnects without repeated file conversion. The completed four-stage amplifier achieved more than 20 dB gain and 27–30 dBm output from 55 to 68 GHz. RF transition loss remained below 0.6 dB through 65 GHz, with measured S-parameters closely matching simulation.

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